B. Tech (BPUT)

M. Tech (BPUT)

Digital Communication

PMEC – Since 28.07.2016

• AEC
• DEC
• Basic Electronics Circuit
• Physics of Semiconductor & Devices
• Electromagnetic Field & Wave
• Control System Engineering
• Radar & Television Engineering
• DSP
• Communication System Engineering
• VLSI
• Analog Communication Technique
• Satelite Communication, Digital Communication Technique. 

The Institution of Engineers ( INDIA ), Computer Society of India ( CSI )

[1] S. Sunani, S. S. Mahato, and R. Swain, “Design and performance analysis of single material and triple material cylindrical gate all around gate stack silicon nanowire FET at 7 nm technology node,” in 2025 IEEE 6th India Council International Subsections Conference (INDISCON), 2025.

[2] S. Sunani, S. S. Mahato, N. Sahoo, A. K. Panigrahy, et al., “A simulation study of 7 nm Si-based multiple gate material nanosheet field effect transistors,” Semiconductors, vol. 59, no. 7, pp. 724–736, 2025.

[3] T. M. K. Sunani, R. Swain, and P. K. Mohanty, “Rectangular microstrip patch antenna for Wi-Fi applications at 2.4–2.483 GHz using FR4 and RT/Duroid substrate,” Kronika Journal, vol. 25, no. 7, pp. 272–281, 2025.

[4] S. Sunani, S. S. Mahato, K. Jena, and R. Swain, “Erratum: Comparative analysis of single and triple material 10 nm tri-gate FinFET,” J. Korean Phys. Soc., vol. 85, no. 9, pp. 791–791, 2024.

[5] S. Sunani, S. S. Mahato, K. Jena, and R. Swain, “Comparative analysis of single and triple material 10 nm tri-gate FinFET,” J. Korean Phys. Soc., 2024.

[6] S. M. Mishra, A. Dastidar, and R. Swain, “Design and analysis of gate-stack 7 nm node tri-gate FinFET for low power application,” in 2023 1st International Conference on Circuit, Power and Intelligent Systems, 2023.

[7] S. Sunani, “Implementation of full adder using MUX by applying Shannon expansion theorem,” in Proc. Int. Conf. Eng. Humanities Sci. (ICEHS-2017), 2017, pp. 52–57.

[8] R. Patra and S. Sunani, “A review on different computing method for breast cancer diagnosis using artificial neural network and datamining techniques,” Int. J. Adv. Res., vol. 4, no. 11, pp. 598–610, 2016.

[9] S. M. Sunani and B. Mallick, “For secure medical care: Uses of sensors & wireless communication.”

[10] S. Sunani, S. S. Mahato, A. K. Panigrahy, et al., “Design and analysis of gate stack 7 nm triple material gate nanosheet FET for low power application,” in 5th International Conference on Micro/Nanoelectronics Devices, Circuits ….

[11] S. Sunani, R. Swain, P. K. Mohanty, and T. M. Kumari, “Rectangular microstrip patch antenna for Wi-Fi applications at 2.4–2.483 GHz using FR4 and RT/Duroid substrate.”

[12] R. N. P. Sunanai and M. Panda, “Mathematical modelling of Simulink based photovoltaic power genration system,” Int. J. Adv. Eng. Global Technol.

[13] “A hardware implementation of MATLAB based face recognition door access.”

[1] Two Weeks Industrial Training on EV Technology, The National Small Industries Corporation Ltd. Technical Service Center, Aug. 2023.

[2] Orientation Towards Technical Education and Curriculum, National Institute of Technical Teachers Training and Research, Apr.–May 2021.

[3] Professional Ethics & Sustainability, National Institute of Technical Teachers Training and Research, Apr.–May 2021.

[4] Communication Skills Modes & Knowledge Dissemination, National Institute of Technical Teachers Training and Research, Apr.–May 2021.

[5] Instructional Planning and Delivery, National Institute of Technical Teachers Training and Research, Apr.–May 2021.

[6] Student Assessment and Evaluation, National Institute of Technical Teachers Training and Research, Apr.–May 2022.

[7] Creative Problem Solving, Innovation and Meaningful R&D, National Institute of Technical Teachers Training and Research, Apr.–May 2022.

[1] S. Sunani, S. S. Mahato, A. K. Panigrahy, et al., “Design and analysis of gate stack 7 nm triple material gate nanosheet FET for low power application,” in Proc. 5th Int. Conf. Micro/Nanoelectronics Devices, Circuits, and Systems, Dept. Electron. Commun. Eng., National Institute of Technology Silchar, Jan. 29–31, 2025.

[2] S. Sunani, S. S. Mahato, and R. Swain, “Design and performance analysis of single material and triple material cylindrical gate-all-around gate-stack silicon nanowire FET at 7 nm technology node,” in Proc. 6th IEEE India Council Int. Subsections Conf. (INDISCON), National Institute of Technology Rourkela, Aug. 21–23, 2025.

Department of ETC,

Parala Maharaja Engineering College, Berhampur,

Odisha – 761003