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Dr. Raghunandan Swain

Dr. Raghunandan Swain

Name : Dr. Raghunandan Swain
Designation : Assistant Professor (Selection Grade)
Phone No. : NA
Email Id : [email protected]
Date of Joining : 27.7.2016

B. Tech (NIST Berhampur)

M. Tech (NIST Berhampur)

Ph.D. (NIT Silchar)

Modeling and Simulation of III-V compound semiconductor devices (normally-off HEMTs, MOSHEMTs, FinHEMTs, MOS-FinHEMTS), FPGA/ASIC implementation of Neural Network architectures for Face Recognition Applications.

NIST Berhampur (July 2012 to July 2013)

PMEC Berhampur (Since July 2016)

Basic Electronics, Analog Electronics Circuit, Digital Electronic Circuit, Switching Circuits and Logic design, Semiconductor Devices, MEMS, Digital VLSI Design, Radar and TV Engineering, Audio Video Engineering, Electronic Device Modelling, System Design using Integrated Circuit, Electronic Design and Automation, Embedded Systems.

1. DST Young Scientist Grant under International Travel Support (ITS) scheme to attend IEEE TENCON 2015 at Macau from 01-04 Nov 2015.
2. Fellowship to attend International Symposium on Semiconductor Materials and Devices 2015 at Anna University, Chennai
3. Reviewer of International Journal of Numerical Modelling: Electronic Networks, Devices, and Fields (Wiley Publications).
4. Reviewer of IEEE Open Journal of Power Electronics.
5. Reviewer of IEEE Journal of Emerging and Selected Topics in Power Electronics

Awarded

  1. Dr. Ashutosh Chakrabarty from BPUT on the topic “Modeling and Simulation of AlGaN/GaN E-mode MOS-FinHEMT for Power Electronic Applications”

Continuing

  1. Ms. Sasmita Padhy registered at NIST university on topic “Hardware Implementation of Face Recognition System for Criminal Identification using FPGA”
  2. Ms. Shankhmitra Sunani registered at NIST university on topic “Study of Innovative Nano-channel Transistors for Low Power Applications through Analytical Modeling and TCAD Simulation”
  3. Mr. Nawal Topno registered at BPUT on the topic “Study of Nano-channel Devices for High Frequency Applications”

 

  1. Professor In-Charge Of Procurement Cell PMEC from 19.02.2026 to till date
  2. Professor In-Charge Of ERP-Cell / ERP Administrator from 02.08.2023 to till date
  3. Member of IQAC Cell from 25.11.2017 to till date
  4. Warden of Falguni Hall of Residence from 29.01.2024 to till 28.10.2024
  5. Professor In-Charge for activities under MOU between PMEC and BU from 07/03/2022 to till date
  6. Institute Coordinator for IIRS Program Conducted By ISRO from 24/06/2020 till date
  7. Faculty Advisor of Cultural Association from 05/08/2023 to till date
  8. Superintendent of Off-Campus Boys Hostel from 01/03/2021 to 31/08/2023
  9. SPOC and co-ordinator for TCS Youth Employment Program from 02/12/2020 to 31/07/2023
  10. Co-ordinator of Spoken Tutorial Software Training Program conducted By IIT Bombey from 07/09/2016 to 30/09/2017
  11. Assistant Superintendent Of Boys Hostel 2 from 17/09/2016 to 18/07/2017
  12. Officer-in-charge of Training and Placement Cell from 19/07/2019 to 26/08/2019
  13. NSS Programm Officer from 02/03/2017 to 31/03/2018
  14. Co-Convener of Techfest in 6th Annual Cultural Function from 15/03/2017 to 31/03/2017

1. Senior Member, IEEE-EDS (Membership No. 92843511) since 2013.
2. Life Member, ISTE.

Journals:

  1. Patra, A. K Sahu, R. Swain, N. Sahoo, “Enhanced electron transport in armchair graphene nanoribbon step barrier resonant tunnelling diodes through geometrical and field modifications,” Engineering Research Express, Vol. 7, No. 4, pp. 045309, 2025. DOI: doi.org/10.1088/2631-8695/ae0bf1
  2. S Sunani, S. S Mahato, N. Sahoo, A. K Panigrahy, R Swain, “A simulation study of 7 nm Si-based Multiple Gate Material Nanosheet Field Effect Transistors,” Semiconductors 59, No. 7, pp. 724-736, 2025, DOI: doi.org/10.1134/S1063782625600573
  3. K. Panigrahy, R. Rastogi, P. R. Avula, S. Kolekar, K. Joshi, R. Swain, “Development and Comparative Analysis of a GAA Nanosheet FET across Diverse Space Charge Region Materials for Nanoscale Applications,” Micro and Nanostructures, Vol. 206, pp. 208239, 2025. DOI: doi.org/10.1016/j.micrna.2025. 208239
  4. Mounika, J. Ajayan, A. K. Panigrahy, R. Swain, S. Sreejith, “Nanoscale recessed T-gated ScAlN/GaN-HEMT on SiC wafer with graded back-barrier and Fe-doped buffer for future RF power amplifiers: a simulation study,” Journal of Korean Physical Society, 2024, DOI: doi.org/10.1007/s40042-024-01222-4
  5. Sunani, S. S. Mahato, K. Jena, R. Swain, “Comparative analysis of single and triple material 10 nm Tri-gate FinFET,” Journal of Korean Physical Society, 2024, DOI: doi.org/10.1007/s40042-024-01191-8
  6. N. Mishra, A. N. Khan, K. Jena, R. Swain, “Mole fraction effects on AlxGa1−xN/AlN/GaN MOSHEMT analog/RF performance: analytical model and simulation assessment,” Microsystem Technologies, 2024. DOI: doi.org/10.1007/s00542-024-05742-8
  7. S Patra, A. K. Sahu, M. Mishra, Swain, N. Sahoo, “Study of conductance in graphene nanochannels for symmetric and asymmetric junction configurations,” Microsystem Technologies, 2024. DOI: doi.org/10.1007/s00542-024-05732-w
  8. Topno, V. Hemaja, D. K. Panda, D. K. Dash, R. Swain, S. Mallik, J. K. Dash, “Performance characterization of Ferroelectric GaN HEMT based biosensor,” Microsystem Technologies, 2004. DOI: 10.1007/s00542-024-05727-7
  9. K. Sahu, N. Sahoo, R. Swain, T. Sahu, “Effect of non-square potential profile on three subband electron mobility in AlGaAs quantum well structures” Physica Scripta, vol. 99, pp. 075996, 2024. DOI: 10.1088/1402-4896/ad59d6
  10. Chakrabarty, N. Sahoo, A. K. Panigrahy, V. B. Sreenivasulu, R. Swain, “DC and RF performance analysis of enhancement mode fin-shaped tri-gate AlGaN/GaN HEMT and MOSHEMT with ultra-thin barrier layer” Physica Scripta, vol. 99, pp. 075020, 2024. DOI: 10.1088/1402-4896/ad5235
  11. Panda, R. S. Parida, G. C. Dora, R. Swain, A. K. Panigrahy, A. K. Reddy, M. Suresh, “Effect of Temperature, Doping and Gate Material Engineering on Tri-Gate SOI nFinFET Performance Through TCAD Simulation,” Transaction in Electrical Electronic Materials, Vol. 25, pp 600–607, May 2024. DOI: 10.1007/s42341-024-00543-2
  12. K. Panigrahy, V. V. Sai Amudalapalli, D. S. Rani, M. N. Bhukya, H. B. Valiveti, V. B. Sreenivasulu, R. Swain, “Spacer Dielectric Analysis of Multi-Channel Nanosheet FET for Nanoscale Applications,” IEEE Access, vol. 12, pp. 73160-73168 2024 DOI: 10.1109/ACCESS.2024.3392621.
  13. Chakrabarty, R. Swain, N. Sahoo, K. Jena, A. K. Panigrahy, T. R. Lenka, “Barrier and channel thickness engineering to optimize fin height for enhancement mode Al0.3Ga0.7N/GaN FinHEMT, International Journal of Numerical Modeling, vol. 37, no. 2, pp. e3197, 2024. DOI:10.1002/jnm.3197
  14. K. Panigrahy, S. Hanumanthakari, S. B. Devamane, S. B. Choubey, M. Prasad, D. Somasundaram, N. Kumareshan, N. A. Vignesh, G. Subramaniam, M. D. Prakash, R. Swain, “Analysis of GAA Junction Less NS FET Towards Analog and RF Applications at 30 nm Regime,” IEEE Open Journal of Nanotechnology, vol. 5, pp. 1-8, 2024, DOI: 10.1109/OJNANO.2024.3365173.
  15. K. Panigrahy, S. R. Maniyath, M. Sathiyanarayanan, M. Dholvan, T Ramaswamy, S. Hanumanthakari, N. A. Vignesh, S. Kanithan, R. Swain, “A Faster and Robust Artificial Neural Network based Image Encryption Technique with Improved SSIM”, IEEE Access, vol. 12, pp. 10818-10833, 2024.
  16. Amani, A. K. Panigrahy, A. Choubey, S. B. Choubey, V. B. Sreenivasulu, D. V. Nair, R. Swain, “Design and comparative analysis of FD-SOI FinFET with dual-dielectric spacers for high speed switching applications” Silicon, vol. 16, pp. 1525-1534, 2024.
  17. Yuvaraj, A. Karuppannan, A. K. Panigrahy, R. Swain, “Design and Analysis of Gate Stack Silicon‑on‑Insulator Nanosheet FET for Low Power Applications,” Silicon, Vol. 15, pp. 1739–1746, 2023. DOI: 10.1007/s12633-022-02137-0
  18. Durga Prakash, S. L. Nihal, S. Ahmadsaidulu, R. Swain, A. K. Panigrahy, “Design and Modelling of Highly Sensitive Glucose Biosensor for Lab-on-chip Applications” Silicon, Vol. 14, pp. 8621–8627, 2022. DOI: 10.1007/s12633-021-01543-0
  19. Chakrabarty, R. Swain, “Modelling of fin width dependent threshold voltage in fin shaped nano channel AlGaN/GaN HEMT”, Superlattices and Microstructures, vol. 141, p. 106497, 2020. DOI: 10.1016/j.spmi.2020.106497.
  20. Amarnath, R. Swain, and T. R. Lenka, “Modeling and simulation of 2DEG density and intrinsic capacitances in AlInN/GaN MOSHEMT”, International Journal of Numerical Modeling, vol. 31, no. 1, pp. 1-8, 2018. DOI: 10.1002/jnm.2268.
  21. Shougaijam, R. Swain, C. Ngangbam, T. R. Lenka, “Analysis of morphological, structural and electrical properties of annealed TiO2 nano wires deposited by GLAD technique,” Journal of Semiconductors, vol. 38, no. 5, pp. 053001, 2017. DOI:10.1088/1674-4926/38/5/053001.
  22. Swain, K. Jena and T. R. Lenka, “Modeling of Capacitance and Threshold Voltage for ultra- thin normally-off AlGaN/GaN MOSHEMT,” Pramana-Journal of Physics, vol. 88, no. 1, pp. 1-7, 2017. DOI. 10.1007/s12043-016-1310-y.
  23. Jena, R. Swain, and T. R. Lenka, “Physics-Based Mathematical Model of 2DEG Sheet Charge Density and DC Characteristics of AlInN/AlN/GaN MOSHEMT”, International Journal of Numerical Modeling, vol. 30, no. 1, pp. 1-11, 2017. DOI: 10.1002/jnm.2117.
  24. Swain, K. Jena and T. R. Lenka, “Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT”, Material Science in Semiconductor Processing, vol. 53, pp. 66-71, 2016. DOI: 10.1016/j.mssp.2016.06.008.
  25. Swain, K. Jena and T. R. Lenka, “Modeling of Forward Gate Leakage Current in MOSHEMT using Trap Assisted Tunneling and Poole-Frenkel Emission”, IEEE Transactions on Electron Devices, vol. 63, no. 6, pp. 2346-2352, 2016. DOI: 10.1109/TED.2016.2555851.
  26. Jena, R. Swain, and T. R. Lenka, “Effect of thin gate dielectrics on DC, RF and Linearity characteristics of Lattice-Matched AlInN/AlN/GaN MOSHEMT”, IET Circuits, Devices & Systems, vol 10, no. 5, pp. 423-432, 2016. DOI: 10.1049/iet-cds.2015.0332.
  27. Panda, K. Jena, R. Swain, T. R. Lenka, “Modeling on oxide dependent 2DEG sheet charge density and threshold voltage in AlGaN/GaN MOSHEMT,” Journal of Semiconductors, vol. 37, no. 4, pp. 044003, 2017. DOI: 10.1088/1674-4926/37/4/044003.
  28. Shougaijam, R. Swain, C. Ngangbam, T. R. Lenka, “Enhanced Photodetection by Glancing Angle Deposited Vertically Aligned TiO2 Nanowires,” IEEE Transaction on Nanotechnology, vol. 15, no. 3, pp. 389-394, 2016. [IF: 1.825, SCI, JCR].DOI: 0.1109/NANO.2016.2536162.
  29. Swain, K. Jena and T. R. Lenka, “Model Development for I-V and Transconductance Characteristics of Normally-off AlN/GaN MOSHEMT”, Semiconductors, vol. 50, no. 3, pp. 384-389, 2016. [IF: 0.739, SCI, JCR]. DOI:10.1134/S1063782616030210.
  30. Jena, R. Swain, and T. R. Lenka, “Impact of AlN Spacer on Analog Performance of Lattice-Matched AlInN/AlN/GaN MOSHEMT”, Journal of Electronic Materials, vol. 45, no. 4, pp. 2172-2177, 2016. [IF: 1.798, SCI, JCR].DOI: 10.1007/s11664-015-4296-1.
  31. Jena, R. Swain, and T. R. Lenka, “Impact of a Drain Field Plate on the Breakdown Characteristics of AlInN/GaN MOSHEMT”, Journal of Korean Physical Society, vol. 67, no. 9, pp. 1592-1596, 2015.[IF: 0.4, SCI, JCR]. DOI: 10.3938/jkps.67.1592.
  32. Jena, R. Swain, T. R. Lenka, “Impact of oxide thickness on gate capacitance-Modeling and Comparative Analysis of GaN based MOSHEMTs”, Pramana-Journal of Physics, vol. 85, no. 6, pp 1221–1232,2015.[IF: 0.720, SCI, JCR]. DOI: 10.1007/s12043-015-0948-1.
  33. Swain, J. panda, K. Jena and T. R. Lenka, “Modeling and Simulation of Oxide Dependent 2DEG Sheet Charge Density in AlGaN/GaN MOSHEMT”, Journal of Computational Electronics, vol. 14, no. 03, pp. 754-761, 2015. [IF: 1.520 SCIE, JCR].DOI: 10.1007/s10825-015-0711-3.
  34. Swain, K. Jena and T. R. Lenka, “Interface DOS Dependent Analytical Model Development for DC Characteristics of Normally-off AlN/GaN MOSHEMT”, Superlattices and Microstructures, vol. 84, pp. 54-65, 2015. [IF: 2.097, SCI, JCR].DOI:10.1016/j.spmi.2015.04.025.
  35. Jena, R. Swain, T. R. Lenka, “Modeling and comparative analysis of DC characteristics of AlGaN/GaN HEMT and MOSHEMT devices”, International Journal of Numerical Modeling, vol. 29, no. 1, pp. 83-92, 2015. [IF: 0.629, SCI, JCR]. DOI: 10.1002/jnm.2048.
  36. Jena, R. Swain, T. R. Lenka, “Impact of barrier thickness on gate capacitance—Modeling and Comparative analysis of GaN based MOSHEMTs”, Journal of Semiconductors, vol. 36, no. 3, pp. 034003, 2015. DOI:10.1088/1674-4926/36/3/034003.

Conference Publications

  1. A. Pala, M. Tripathy, R. Swain, D. K. Dash, S Mallik, “Zero-Shot Learning for Face Recognition in Cyber Security: Enhancing Model Generalization with Limited Data,” Intelligent Systems: Proceedings of 5th International Conference on Machine Learning, IoT and Big Data (ICMIB 2025), Parala Maharaja Engineering College, 2025.
  2. M. Amani, B. V. Reddy, R. Swain, D. V. Nair, A. K. Panigrahy, “Design and Analysis of 10-nm FD-SOI FinFET by Dual-dielectric Spacers for High Speed Switching,” 8th International Conference on Micro-Electronics, Electromagnetics and Telecommunications (ICMEET-2023), National Institute of Technology Mizoram, 2023.
  3. M. Mishra, A. Dastidar, R. Swain and S. Sunani, “Design and Analysis of Gate-Stack 7 nm node Tri-gate FinFET for low power Application,” 2023 1st International Conference on Circuits, Power and Intelligent Systems (CCPIS), Bhubaneswar, India, 2023, pp. 1-5, doi: 10.1109/CCPIS59145.2023.10291277.
  4. S. Panda, R. S. Parida, G. C. Dora and R. Swain, “Performance Evaluation of Nano-channel FinFET For Lower Power Application,” 2023 3rd International conference on Artificial Intelligence and Signal Processing (AISP), VIJAYAWADA, India, 2023, pp. 1-4, doi: 10.1109/AISP57993.2023.10134767.
  5. M. S. Alapati, R. Swain and A. K. Panigrahy, “Hardware Implementation of Posit Numeration System using FPGA for Signal Processing Applications,” 2023 7th International Conference on Trends in Electronics and Informatics (ICOEI), Tirunelveli, India, 2023, pp. 278-282, doi: 10.1109/ICOEI56765.2023.10125920.
  6. S. Preeti, A. Padhy and R. Swain, “Incorporating 5G with Human Body Communication through RedTacton Technology,” 2021 IEEE 2nd International Conference on Applied Electromagnetics, Signal Processing, & Communication (AESPC), Bhubaneswar, India, 2021, pp. 1-4, doi: 10.1109/AESPC52704.2021.9708490.
  7. A. Chakrabarty, R. Swain and A. K. Panda, “Fin Width dependent Threshold Voltage Modeling in AlGaN/GaN Fin shaped nano channel HEMT,” 2020 IEEE Calcutta Conference (CALCON), Kolkata, India, 2020, pp. 356-358, doi: 10.1109/CALCON49167.2020.9106486.
  8. A. Chakrabarty, A. K. Panda and R. Swain, “Surface Potential based modeling of Sheet Charge Density and Estimation of Critical Barrier Thickness in AlGaN/GaN HEMT,” 2019 IEEE 16th India Council International Conference (INDICON), Rajkot, India, 2019, pp. 1-4, doi: 10.1109/INDICON47234.2019.9030295.
  9. R. Swain and T. R. Lenka, “Comparative study of critical barrier thickness for normally-off GaN-MOSHEMTs”, IWPSD, 07-10 Dec, Bangalore, 2015.
  10. R. Swain and T. R. Lenka, “Investigation of Critical Barrier Thickness in Lattice Matched InAlN/GaN MOSHEMT towards Normally-off Operation”, IEEE TENCON, Macau, 01-04 Nov, 2015.(IEEE Xplore)
  11. R. Swain, K. Jena, T. R. Lenka, G. N. Dash and A. K. Panda, “DC & RF Characteristics of normally-off AlN/GaN MOSHEMT by varying Oxide Thickness,” IEEE conference on Electron devices and Solid-State Circuits, Singapore, June 1-4, 2015. (IEEE Xplore)
  12. R. Swain and T. R. Lenka, “Normally-off Al0.25Ga0.75N/GaN MOSHEMT with Stack Gate Dielectric Structure”, IEEE conference on Electron devices and Solis-State Circuits, Singapore, June 1-4, 2015. (IEEE Xplore)
  13. J. Panda, R. Swain, G. S. Rao, and T. R. Lenka, “Realization of Improved Transconductance and capacitance Characteristics in Al0.3Ga0.7N/AlN/GaN HEMT”, IEEE International Conference: Electrical, Electronics, Signals, Communication & Optimization-EESCO, Visakhapatnam, Jan 24-26, 2015. (IEEE Xplore)
  14. R. Swain, K. Jena, A. Gaini, and T. R. Lenka, “Comparative Study of AlN/GaN HEMT and MOSHEMT Structures by Varying Oxide Thickness”,IEEE Nanotechnology Materials and Devices Conference, Aci Castello, Italy, Oct 12-15, 2014. (IEEE Xplore)

Book Chapter

  1. A. Chakrabarty, R. Swain, (2024), “Evolution of GaN Based HEMTs Towards Achieving Enhancement Mode Operation,” In: Nirmal, D., Ajayan, J. (eds) Modeling of AlGaN/GaN High Electron Mobility Transistors. Springer Tracts in Electrical and Electronics Engineering. Springer, Singapore. https://doi.org/10.1007/978-981-97-7506-4_10
  2. N. Topno, R. Swain, D. K. Dash, M. Suresh, (2024), “Ge-Channel Nanosheet FinFETs for Nanoscale Mixed Signal Application,” In: T. R. Lenka, H. P. T. Nguyen, (eds) Nanoelectronic Devices and Application. Bentham Books.
  3. M. Amani, B. V. Reddy, R. Swain, D. V. Nair, A. K. Panigrahy, (2024), “Design and Analysis of 10-nm FD-SOI FinFET by Dual-Dielectric Spacers for High-Speed Switching,” In: V.V.S.S.S. Chakravarthy, V. Bhateja, J. Anguera, S. Urooj, A. Ghosh, (eds) Advances in Microelectronics, Embedded Systems and IoT. ICMEET 2023. Lecture Notes in Electrical Engineering, vol. 1156. Springer, Singapore. https://doi.org/10.1007/978-981-97-0767-6_18
  4. R. Swain, T. R. Lenka, (2023), “Enhancement-Mode MOSHEMT,” In: T. R. Lenka, H. P. T. Nguyen, (eds) HEMT Technology and Applications. Springer Tracts in Electrical and Electronics Engineering. Springer, Singapore. https://doi.org/10.1007/978-981-19-2165-0_10

  1. “Hardware implementation of face recognition system for criminal identification using FPGA and ASIC,” MeitY, Duration-5yr, Rs. 65.19 Lakhs.

  1. Five days ATAL FDP on “Mitigating Climate Change Through Sustainable Electrical Engineering Solutions” from 20th to 25th Feb 2025 organized by Parala Maharaja Engineering College.
  2. Five days IEP on “FPGA based SOC design covering Dir-V architecture and application” from 09th to 13th December 2024 organized by NEILIT Calicut under C2S programme of MEITY, Govt. of INDIA.
  3. Six days FDP on “AI Evolution: From Foundations to Generative AI” from 22nd to 27th Jan 2024 organized by Microsoft, SAP & AICTE under TechSaksham.
  4. Five days FDP on “Applied Cloud Computing for Full Stack Web Development” from 5th to 9th Feb 2024 organized by Microsoft, SAP & AICTE under TechSaksham
  5. Six-day virtual workshop on “Research Opportunities in Semiconductor Materials and Devices (ROSMD-2022)” from October 19th to 24th Oct 2022 organized by SRM Institute of Science and Technology, Kattankulathur.
  6. Five Days ATAL online FDP on “Recent Trends in Bio MEMS and Medical Micro devices: From Devices to Applications” from 20th to 24th Aug 2021 organized by NIT Silchar.
  7. Five Days ATAL online FDP on “Physics of Nanoelectronics” from 2nd to 6th Aug 2021 organized by IIT Kanpur.
  8. Online Training Programme in Modular Mode equivalent to one-week duration on “E-Content Development and Learning Management Systems” organised by NITTTR from 14.06.2021 to 30.06.2021.
  9. Five Days online workshop on “Machine Learning and Deep Learning” from 11th to 15th Jan 2021 organized by PMEC in association with CDAC Pune, Berhampur.
  10. Three Days TEQIP online workshop on “Internet of Things: Industry, Academia and Start-up” from 21st to 23rd Dec 2020 organized by IIT Hyderabad.
  11. Five Days ATAL online FDP on “Computer Science and Biology” from 12th to 16th Oct 2020 organized by NIT Silchar.
  12. Six days FDP on “Recent Advancements in Semiconductor Technologies – RASET 20” from 9th to 14thOctober 2020 organized bySRMIST, Chennai.
  13. Five Days TEQIP online workshop on “Analog IC design using free Software Tools” from 2nd to 6th Oct 2020 organized by IIT Hyderabad.
  14. Five Days ATAL online FDP on “Internet of Things” from 23rd to 27th Sept 2020 organized by IIIT Tiruchirapalli.
  15. Five days online FDP on “Contemporary Research Trends in Electronics & Communications and Computer Science” from 6th to 10th July 2020 organized by centre for advanced post graduate studies, VTU in association with IETE.
  16. Six days “Science Leadership Workshop” from 22nd to 28thJune, 2020 organized by Central University of Punjab.
  17. Three days workshop on “Signal Processing Techniques for 5G Communication” from 25th to 27th Sept, 2019 at NIST, Berhampur.
  18. One day workshop on “Nurturing a Learning Environment” on 13th Aug, 2019 at PMEC, Berhampur.
  19. Five days workshop on “End to End Innovation Program” from 20th to 24th Aug, 2018 at Tata Center for Technology and Design, IIT Bombay.
  20. Five days workshop on “Active Learning on Pedagogy and Research” from 4th to 8th June, 2018 at IIT Bombay.
  21. Six days workshop on “Professional Development Training” from 12th to 17th Feb, 2018 at IIM Udaipur.
  22. Presented paper entitled “Investigation of Critical Barrier Thickness in Lattice Matched InAlN/GaN MOSHEMT towards Normally-off Operation” in IEEE TENCON 2015 – IEEE Region-10 Conference, 1st to 4th November 2015, at Hotel Holiday Inn, Sands Cotai Central, Macau.
  23. IEEE-EDS Distinguished Lecturer (DL) Talk by Prof. M. K. Radhakrishnan, Nanorel Technologies, on 15 Sept 2015 at NIT Silchar.
  24. Five Days AICTE sponsored Faculty Development Program on “Recent Trends in Microwave and Antenna Technology” from 18th to 22nd May, 2015 at NITSilchar.
  25. Presented poster entitled “Role of Oxide Interface Charge for Shift in Threshold Voltage of AlN/GaN MOSHEMT with Different Gate Dielectrics”in 3rdInternational Symposium on Semiconductor Materials and Devices (ISSMD-3), 2nd to 5th February 2015, at Crystal Growth Center, Anna University, Chennai.
  26. Three days workshop on “Recent Trends in Microelectronics and MEMS Technologies” from 10th to 12th April, 2015 at NIT Silchar.
  27. INUP Hands-on Training Workshop and participated in the Hands-on Training on MOS Capacitor and Micro and Nano Characterization Techniques from 7th to 16th October, 2014 at IISc, Bangalore.
  28. One Week National Symposium on High-Performance Computing from 04th to 09th April 2014 at NIT Silchar.
  29. Two-day Workshop on “Coventor Ware MEMS Design Software” by FTD Infocom from 11th to 12th March 2014 at NIT Silchar.
  30. Two Days Workshop on “MEMS and SENSORS” from 11th to12thSeptember 2013 at NIT Silchar.
  31. IEEE-EDS Distinguished Lecturer (DL) Talk by Prof. V. Ramgopal Rao and Prof. Richard Pinto, IIT Bombay on 10 Sept 2013 at NIT Silchar.
  32. One Day Seminar on “Interdisciplinary Research on Biomedical Engineering” on 26th Aug 2013 at NIT Silchar.
  33. One Day IEEE-EDS Mini-colloquiumon “Nanoelectronics” on 30thNov 2010 at NIST,Berhampur
  1. 1st IEEE International Conference on “Artificial Intelligence and Machine Learning in Communication and Power System” (AIMLCPS-2026) from 20th – 21st February 2026.
  2. AICTE-VAANI Sponsored Two day Workshop on “Innovative Energy Efficient Systems for a Self-Reliant India: A Roadmap to Viksit Bharat 2047” from 12th–13th September 2025.
  3. One Day Webinar on “VLSI System design using Xilinx and Mentor” on 24th Dec, 2021.
  4. One Week National Workshop on “Offensive and Defensive Aspects of Cyber Security (NWODACS-2020)” from 15th – 19thDec, 2020.
  5. Three Days Webinar on “Electronic Devices and VLSI Design (EDVD-2020)” from 25th to 27th Sept, 2020.
  6. National Seminar on “Recent Trends and Challenges in Silicon and GaN Devices and Circuits” from 27th to 28th Feb, 2020.

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